Samsung foundry has developed 3nm GAA chip.

Multisubsystem SoC output adopts Synopsys Fusion design platform of foundry gateway and (GAA) 3nm transistor technology. Use Gateway Transistor Architecture (GAA). This requires a different design and certification tool than the FinFET transistor structure used by TSMC and Intel. This is why Samsung uses the Synopsys Fusion design platform.


Because the process started in May 2019, and the tool was validated in the process last year. This recording is the result of extensive cooperation between Synopsys and Samsung foundries, aimed at accelerating the deployment of highly optimized GAA process performance testing methods. This stream contains the integrated RTLtoGDSII development stream with golden signal support and golden signal.

This stream is aimed at customers who want to use the 3nm GAA process for chips in 5G, highperformance computing (HPC), mobile, and advanced, artificial intelligence (artificial intelligence). Samsung introduced PDK for 3nm solution.The Fusion design platform includes Fusion Compiler for digital design, IC Compiler II place and route and Design Compiler RTL synthesis, PrimeTime synchronization signature, StarRC extraction signature, physical signature from IC verifier, and SiliconSmart library features.


Samsung foundry has developed 3nm GAA chip.

Handling physical 3nm IP tapes for the ARMv9 project Synopsys migrates Moortec PVT sensors to 3nm TSMC is looking for 2nm process More articles on eeNews Europe Intel provides RISCV cores for 7nm foundriesQualcomm uses a 4 nm OpenRAN 5G small cell platform and uses a light shield made of metamaterials to reduce noise


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pratik patil
pratik patil

Pratik Patil is a strong supporter of technology and anything including the word smart. This inspires his love for writing on everything related to the technology industry.

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