Today, Samsung Electronics, a world leader in advanced semiconductor technology, hosted its 3rd Annual Samsung Advanced Foundry Ecosystem (SAFETM) Forum 2021 virtually.
Samsung and its foundry ecosystem partners prepared 7 plenary talks and 76 technology sessions around the theme of ‘Performance Platform 2.0: Innovation, Intelligence, Integration,’ which focused on three main topics: Gate-All-Around (GAA, Innovation), Artificial Intelligence (AI, Intelligence), and 2.5D/3D (Integration) technologies, as well as the diverse design infrastructures required for high-performance applications.
“In this rapidly changing data-centric era, Samsung and its foundry partners have made significant progress in responding to increasing customer demand and supporting their success by providing powerful solutions,” said Ryan Lee, Samsung Electronics’ Senior Vice President and Head of Foundry Design Platform Development. “Samsung will lead the realisation of the vision ‘Performance Platform 2.0’ with the help of our SAFE programme.”
Starting with a keynote live streaming on November 17, attendees are able to explore a variety of tech sessions and engage with ecosystem partners through the virtual SAFE Forum platform for a month. To register for SAFE forum, please visit https://www.samsungfoundry.com.
SAFE 2021: Performance Platform 2.0
Samsung has focused on developing its foundry ecosystem by concentrating on IP, Electronic Design Automation (EDA), Cloud, Design Solution Partner (DSP), and Packaging solutions, all of which are essential in today’s data-driven world. Samsung unveiled its newest SAFETM programme today, which includes the following features:
- SAFETM-IP & EDA: Samsung and its network of foundries have reserved approximately 3,600 IPs and 80 approved EDA tools. These are designed and confirmed using Samsung’s high-standard certification methodology, which our partners also participate in. Samsung’s foundry ecosystem has developed not only HPC-specific foundation IPs like standard cell libraries and memory compilers, but also key IPs like the over 100Gbps Serializer-Deserializer (SerDes) interface and 2.5D/3D multi-die integration solutions to meet the demands of high-performance applications.
Samsung has obtained design tools designed for its own 3-nanometer (nm) GAA process technology and design approach for integrating multiple dies in 2.5D/3D with the help of our EDA partners. Customers can also use AI and machine learning-based EDA technology to organise and analyse design data in a systematic way. Samsung has intensified its collaboration with partners to create EDA tools and related technologies, such as adding GPUs that can efficiently utilise computer resources required for chip verification, in order to solve the increasing difficulties of chip design and analysis.
- SAFETM-OSAT: Samsung plans to lead ‘beyond-Moore’ technologies by strengthening various package line-ups such as 2.5D/3D through the expansion of its SAFE-Outsourced Semiconductor Assembly and Test (OSAT) ecosystem. The recent announcement of the co-development of Hybrid-Substrate Cube (H-Cube) solution, which offers efficient integration of 6 HBMs and cost benefit, is one of the successful examples of Samsung foundry’s collaboration with the OSAT community.
- SAFETM-Cloud Design Platform: SAFETM-CDP, the cloud-based one-stop design platform introduced last year, now supports a hybrid cloud function that can be linked to customers’ conventional design environments.
- SAFETM-DSP: Through the SAFETM-DSP ecosystem, Samsung and its global partners can actively support global fabless companies to implement their design ideas into custom product by utilizing cutting-edge process technologies as well as high-performance, low-power chip design knowledge.
[Quote from SAFETM Partner companies]
- Ansys, Ajei Gopal, CEO
“Today’s chips require a complete multiphysics approach, which necessitates engineering simulation.” Samsung has chosen Ansys to provide a comprehensive multi-physics analysis pipeline for their multi-die integration programme. The advantages to joint consumers, the industry – and the rest of the globe – are enormous. Semiconductors will power autonomous and electric vehicles, artificial intelligence, and development of mobile, including 5G and beyond.”
- Arm, Simon Segars, CEO
“Our long-standing cooperation with Samsung Foundry has been critical in expanding our combined partner ecosystem’s commercial potential in numerous areas.” This strong partnership will continue as we improve our Armv9 next-generation processors on Samsung Foundry’s cutting-edge processes, including GAA, to create a best-in-class solution that is optimised for today’s world and tomorrow’s technology. Together, we’re allowing quicker time to market by unlocking new prospects in HPC, Automotive, AI, and IoT while also handling escalating complexity.”
- Cadence, Lip-Bu Tan, CEO
“With shared themes of innovation, ubiquitous intelligence, and integrated solutions, Cadence Intelligent System Design approach is extremely well suited with Samsung Foundry’s Performance Platform 2.0.” We’re helping clients to create and deploy new, game-changing products utilising Samsung’s most advanced process and package technologies, and we’re excited to keep working with Samsung Foundry to expedite creative success.”
- Siemens EDA, J. Incorvaia, Senior Vice President
“Quo This Samsung SAFE event is a fantastic opportunity for the Samsung Foundry community to get together, share knowledge, and explore possibilities to fully use Samsung’s cutting-edge process technology. Siemens EDA is looking forward to this year’s Samsung SAFE event and the numerous possibilities it provides for cooperating with customers and partners to overcome design challenges and improve semiconductor success.”
- Synopsys, Sassine Ghazi, president and COO
“They see exciting times as software and semiconductor technology collide to develop game-changing new products,” stated Synopsys president and COO Sassine Ghazi. “With Samsung Foundry, we have strong initiatives in 3nm gate-all-around enablement, wide IP certification, AI-assisted chip design, and 2.5/3D multi-die design, to mention a few.” We are excited about the Samsung SAFE initiative’s excellent partnership potential.”
