Multi-subsystem SoC output adopts Synopsys Fusion design platform of Samsung foundry gateway and (GAA) 3nm transistor technology. Use Gateway Transistor Architecture (GAA). This requires a different design and certification tool than the FinFET transistor structure used by TSMC and Intel. This is why Samsung uses the Synopsys Fusion design platform.
Samsung 3nm GAA chip
Because the process started in May 2019, and the tool was validated in the process last year. This recording is the result of extensive cooperation between Synopsys and Samsung foundries, aimed at accelerating the deployment of highly optimized GAA process performance testing methods. This stream contains the integrated RTLtoGDSII development stream with golden signal support and golden signal.
This stream is aimed at customers who want to use the 3nm GAA process for chips in 5G, high-performance computing (HPC), mobile, and advanced, artificial intelligence (artificial intelligence). Samsung introduced PDK for a 3nm solution. The Fusion design platform includes Fusion Compiler for digital design, IC Compiler II place and route and Design Compiler RTL synthesis, PrimeTime synchronization signature, StarRC extraction signature, a physical signature from IC verifier, and SiliconSmart library features.
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